Each of these monolithic counters contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the L90 and divide-by-eight for the L93.
All of these counters have a gated zero reset and the L90 also has gated set-to-nine inputs for use in BCD nine’s complement applications.
To use their maximum count length (decade, divide-by-12, or four-bit binary), the B input is connected to the QA output. The input count pulses are applied to input A and the outputs are as described in the appropriate truth table. A symmetrical divide-by-ten count can be obtained from the L90 counters by connecting the QD output to the A input and applying the input count to the B input which gives a divide-by-ten square wave at output QA.
Datasheet – Product page (related)
Manufactured: 1973 (?) week 37